1. Field of the Invention
The present invention relates to a machine and method for simulating a processor-based digital system by interconnecting a processor simulator with a digital model of hardware. More specifically, the present invention relates to a machine and method for testing a system in a simulated environment, wherein the system being simulated is envisioned to contain a processor and digital hardware. Within the simulation environment, the processor simulator and digital model communicate with each other such that true interaction between a real processor and digital hardware is simulated. In this way, enhanced testing of the system and, in particular, the digital hardware, can be conducted prior to fabrication of the actual component.
2. Related Information
In today's high-tech environment, an increasing number of devices utilize computer processors. This includes cars, telephone systems and home appliances. In addition, the number of general purpose computers using such processors is also on the rise. In all these systems, software controls the action of the processor, and the processor then typically controls (and reacts to) the digital hardware within the system. For example, in a telephone system, the processor might write certain data to a specified address of memory (corresponding to a portion of the digital hardware) which causes a certain telephone to ring. Of course, these systems can be capable of millions of different possible types and combinations of operations that can be executed in a relatively short time span.
When developing such complex systems having one or more processors and associated digital hardware, testing is a very important and time-consuming process. In conventional development schemes, the processor is an "off-the-shelf" item that can be purchased from a number of different vendors. The software for the processor is then typically written for the specific purpose contemplated, or else it is purchased and then often modified. The digital hardware is usually custom built for the intended purpose, and then tested independently of the software used to run the processor. Once the hardware testing is complete, the hardware is fabricated, assembled and interfaced with the processor and its associated software.
Testing the processor and fabricated digital hardware together almost always results in more reworking of both the hardware and software, since flaws not detected during the separate testing stage tend to surface at that point. Although reworking the software of the processor can also be a considerable effort, refabrication of the hardware is particularly expensive and time-consuming, especially when dealing with ASIC technology. If a single refabrication can be avoided, the savings to the company is impressive, in both time and money. In addition, in conventional development schemes as described above, the software developers often find themselves waiting until the hardware is re-fabricated so that testing can begin again.
The advent of computer technology generally has enhanced the hardware engineer's ability to test digital hardware by itself. For example, computer-based products allow the engineer to construct digital models to test his or her theories before the hardware is actually fabricated. Typically, to get an accurate assessment of the hardware, virtually each signal of the hardware being tested will be simulated. Unfortunately, the testing that can be done using the digital simulator is still not nearly as thorough as having a processor attached to the fabricated digital hardware. This is because the processor is able to more faithfully and more realistically run the digital hardware through the various possible situations and permutations that can occur in the system and do so in an interactive manner.
The software can, to some degree, also be tested by itself using such devices as processor simulators. However, when a software instruction is encountered that would otherwise send or receive information to or from the digital hardware, the simulation will not be able to accurately reflect the way the real system would react.
A partial solution was discussed in the Massachusetts Institute of Technology graduate thesis by Kenneth J. Duda, published May, 1993, entitled "Extending a Generic Hardware Simulator with a Multi-threaded Programming Language for Embedded System Software Debugging," which is incorporated by reference herein. This partial solution envisioned a process simulator communicating with a process that, in some ways, acted as a digital model. However, what was envisioned was for testing the software portion only, and was totally inadequate to test hypothetical hardware. Thus, testing the software-hardware system also was not possible using this concept.
Consequently, what is needed is a way to allow the processor-digital hardware combination to be more accurately tested prior to fabrication of the digital hardware.